Regviz

Espressif Systems /ESP32-S2 /UART0 /STATUS

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as STATUS

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Espressif Systems/ESP32-S2/UART0/STATUS#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RXFIFO_CNT0 (DSRN)DSRN 0 (CTSN)CTSN 0 (RXD)RXD 0TXFIFO_CNT0 (DTRN)DTRN 0 (RTSN)RTSN 0 (TXD)TXD

Description

UART status register

Fields

RXFIFO_CNT

Stores the number of valid data bytes in RX FIFO.
DSRN

This register represents the level of the internal UART DSR signal.
CTSN

This register represents the level of the internal UART CTS signal.
RXD

This register represents the level of the internal UART RXD signal.
TXFIFO_CNT

Stores the number of data bytes in TX FIFO.
DTRN

This bit represents the level of the internal UART DTR signal.
RTSN

This bit represents the level of the internal UART RTS signal.
TXD

This bit represents the level of the internal UART TXD signal.

Links

()

Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

 ()

Register Reference

https://github.com/espressif/svd